The invention relates to a multi-flash analog-to-digital converter (ADC), in particular dual flash ADC, for digital systems requiring an extremely flash high resolution conversion of an analog input signal into a corresponding digital output code.
Two parts can be distinguished in every flash ADC: an analog and a digital section. The analog section of the conventional flash ADCs consist of a reference source, comparators connected in parallel and a chain of equally valued resistors providing reference voltages thereto. The digital section consists of an encoder for sampling comparator output signals, correcting faulty code sequences and obtaining the binary output code, and a register for storing the code. All ADCs are clocked.
The conventional flash ADCs offer the fastest possible conversion as the quantization level of the input voltage is determined immediately. They do suffer however from many problems, mostly originating from a very high circuit complexity. For instance, an ordinary 10-bit flash ADC demands 1023 comparators and comparable number of switching elements to a modern 16-bit microprocessor. A 16-bit ADC according to ordinary constructions is virtually impossible, requiring 65535 comparators not to mention other necessary components. An input track-and-hold amplifier (THA) is mandatory for optimizing speed and accuracy.
The conventional dual flash ADCs first "flash encode" most significant bits (MSBs) which are then converted in a digital-to-analog converter into an analog signal. This signal is subtracted from the input signal of the ADC, the result is amplified and available for a second conversion in a similar circuit to yield least significant bits (LSBs). The MSBs and LSBs are added for obtaining the output code of the ADC. A THA and a digital correction are necessary.
The dual flash ADCs offer fastest possible conversion, whereby the resolution is almost twice as high as of the flash ADC chip used in the device. Another subranging ADC is a triple flash ADC in which a third conversion is employed for obtaining even higher resolution. The high circuit complexity, variety of technologies, necessity of trimming numerous individual components, etc. makes a monolithic integration of these ADCs troublesome. Not the least of the significant drawbacks is high cost.